Arm Laser Sequence Diagram

sequenceDiagram %% API Registered Routine: Arm Laser (Section: NLOS) participant User as "API Call" participant ArmLaser as "Arm Laser" User->>+ArmLaser: Call Arm Laser participant CheckLaserstatus as "Check Laser status" participant CheckStatusPLD2 as "Check Status PLD2" participant CheckStatusPLD1 as "Check Status PLD1" participant CheckStatusIdler as "Check Status Idler" participant CheckStatusSeed as "Check Status Seed" participant Disarmlaser as "Disarm laser" participant SeedTest as "Seed Test" participant Turnoffseedtest as "Turn off seed test" participant IdlerTest as "Idler Test" participant Turnoffidlertest as "Turn off idler test" ArmLaser->>+CheckLaserstatus: Execute Check Laser Status CheckLaserstatus->>+CheckStatusPLD2: Execute Check PLD2 CheckStatusPLD2->>CheckStatusPLD2: Check STATUS - read_digital (name: STATUS, portnum: 3) CheckStatusPLD2->>CheckStatusPLD2: Check TECG - read_digital (name: TEC G, portnum: 3) CheckStatusPLD2->>CheckStatusPLD2: Format Output Values - output_values (values: ["prev('Check STATUS')","prev('Check TECG')"]) alt minimum(prev('Format Output Values'))==0 CheckStatusPLD2->>CheckStatusPLD2: Raise Error - raise_exception (e: Error in PLD2) end CheckStatusPLD2-->>-CheckLaserstatus: Complete CheckLaserstatus->>+CheckStatusPLD1: Execute Check PLD1 CheckStatusPLD1->>CheckStatusPLD1: Check STATUS - read_digital (name: STATUS, portnum: 2) CheckStatusPLD1->>CheckStatusPLD1: Check TECG - read_digital (name: TEC G, portnum: 2) CheckStatusPLD1->>CheckStatusPLD1: Format Output Values - output_values (values: ["prev('Check STATUS')","prev('Check TECG')"]) alt minimum(prev('Format Output Values'))==0 CheckStatusPLD1->>CheckStatusPLD1: Raise Error - raise_exception (e: Error in PLD1) end CheckStatusPLD1-->>-CheckLaserstatus: Complete CheckLaserstatus->>+CheckStatusIdler: Execute Check Idler CheckStatusIdler->>CheckStatusIdler: Check 1PGM - read_digital (name: 1PGM, portnum: 1) CheckStatusIdler->>CheckStatusIdler: Check TECG - read_digital (name: TEC G, portnum: 1) CheckStatusIdler->>CheckStatusIdler: Check INTERLOCK - read_digital (name: INTRLCK, portnum: 1) CheckStatusIdler->>CheckStatusIdler: Format Output Values - output_values (values: ["prev('Check 1PGM')","prev('Check TECG')","prev('Check INTERLOCK')"]) alt minimum(prev('Format Output Values'))==0 CheckStatusIdler->>CheckStatusIdler: Raise Error - raise_exception (e: Error in idler) end CheckStatusIdler-->>-CheckLaserstatus: Complete CheckLaserstatus->>+CheckStatusSeed: Execute Check Seed CheckStatusSeed->>CheckStatusSeed: Check TECG - read_digital (name: TEC G, portnum: 0) CheckStatusSeed->>CheckStatusSeed: Check INTERLOCK - read_digital (name: INTRLCK, portnum: 0) CheckStatusSeed->>CheckStatusSeed: Format Output Values - output_values (values: ["prev('Check TECG')","prev('Check INTERLOCK')"]) alt minimum(prev('Format Output Values'))==0 CheckStatusSeed->>CheckStatusSeed: Raise Error - raise_exception (e: Error in seed) end CheckStatusSeed-->>-CheckLaserstatus: Complete CheckLaserstatus-->>-ArmLaser: Complete ArmLaser->>+Disarmlaser: Execute Disarm laser Disarmlaser->>Disarmlaser: PULSE1 PLD2 - write_digital (name: PULSE1, portnum: 3, state: false) Disarmlaser->>Disarmlaser: PULSE1 PLD1 - write_digital (name: PULSE1, portnum: 2, state: false) Disarmlaser->>Disarmlaser: ON11V - write_digital (name: ON11V, portnum: 1, state: false) Disarmlaser->>Disarmlaser: ON11V Off - write_digital (name: ON11V, portnum: 0, state: false) Disarmlaser->>Disarmlaser: ONHV Off - write_digital (name: ONHV, portnum: 0, state: false) Disarmlaser-->>-ArmLaser: Complete ArmLaser->>ArmLaser: Save Bram - get_waveform ArmLaser->>ArmLaser: Save Gates - get_gates ArmLaser->>ArmLaser: Select gate regime - select_gate_regime (selected_item: Disabled, name: ) ArmLaser->>ArmLaser: Sleep - pause (seconds: 0.2) ArmLaser->>ArmLaser: Read ADC - start_acquisition ArmLaser->>ArmLaser: SET HVS - write_analog (name: HVS, portnum: 0, value: {HVS}.get('{frequency}')) ArmLaser->>ArmLaser: SET UnegB - write_analog (name: UnegB, portnum: 0, value: {UnegB}.get('{frequency}')) ArmLaser->>ArmLaser: SET OPT_ATT - write_analog (name: OPT_ATT, portnum: 0, value: {OPT_ATT}.get('{frequency}')) ArmLaser->>ArmLaser: SET DILS - write_analog (name: DILS, portnum: 1, value: {DILS}.get('{frequency}')) ArmLaser->>ArmLaser: SET Iset - write_analog (name: Iset, portnum: 3, value: {Iset}.get('{frequency}')) ArmLaser->>+SeedTest: Execute Seed Test SeedTest->>SeedTest: BRAM Load Test Seed - load_waveform (path: {bram_paths}.get('{frequency}')) SeedTest->>SeedTest: Sleep - pause (seconds: 0.2) SeedTest->>SeedTest: Gates Load Test Seed - load_gates (path: data/default_gates.yaml) SeedTest->>SeedTest: Sleep - pause (seconds: 0.2) SeedTest->>SeedTest: Start BRAM Load Test Seed - start_waveform SeedTest->>SeedTest: ON11V ON - write_digital (name: ON11V, portnum: 0, state: true) SeedTest->>SeedTest: HV ON - write_digital (name: ONHV, portnum: 0, state: true) SeedTest->>SeedTest: Sleep - pause (seconds: 3.5) SeedTest->>SeedTest: Check Optical Power 0 - read_analog (name: P-000, portnum: 0) SeedTest->>SeedTest: Eval Optical Power 0 - evaluate_expression (expression: is_value_in_between(prev('Check Optical Power 0'),{opticalPowerSeed0minMax}.get('{frequency}')[0],{opticalPowerSeed0minMax}.get('{frequency}')[1])==False) alt prev('Eval Optical Power 0') SeedTest->>+Turnoffseedtest: Execute Turn Off Seed 1 Turnoffseedtest->>Turnoffseedtest: Turn Off PULSE1 PLD1 - write_digital (name: PULSE1, portnum: 2, state: false) Turnoffseedtest->>Turnoffseedtest: Turn Off ONHV Seed - write_digital (name: ONHV, portnum: 0, state: false) Turnoffseedtest-->>-SeedTest: Complete end alt prev('Eval Optical Power 0') SeedTest->>SeedTest: Raise Exception - raise_exception (e: Seed Error: Error code 1) end SeedTest->>SeedTest: PULSE1 ON PLD1 - write_digital (name: PULSE1, portnum: 2, state: true) SeedTest->>SeedTest: Sleep - pause (seconds: 2.5) SeedTest->>SeedTest: Read ADC - single_offload (plot: false) SeedTest->>SeedTest: Eval Offload 0 - evaluate_expression (expression: is_value_in_between(mean(prev('Read ADC')[2]), {offloadSeed1minMax}.get('{frequency}')[0],{offloadSeed1minMax}.get('{frequency}')[1]) == False) alt prev('Eval Offload 0') SeedTest->>+Turnoffseedtest: Execute Turn Off Seed 2 Turnoffseedtest->>Turnoffseedtest: Turn Off PULSE1 PLD1 - write_digital (name: PULSE1, portnum: 2, state: false) Turnoffseedtest->>Turnoffseedtest: Turn Off ONHV Seed - write_digital (name: ONHV, portnum: 0, state: false) Turnoffseedtest-->>-SeedTest: Complete end alt prev('Eval Offload 0') SeedTest->>SeedTest: Raise Exception - raise_exception (e: Seed Error: Error code 2) end SeedTest->>SeedTest: Turn Off PULSE1 PLD1 - write_digital (name: PULSE1, portnum: 2, state: false) SeedTest-->>-ArmLaser: Complete ArmLaser->>+IdlerTest: Execute Idler Test IdlerTest->>IdlerTest: BRAM Load Test Idler - load_waveform (path: {bram_paths}.get('{frequency}')) IdlerTest->>IdlerTest: Sleep - pause (seconds: 0.2) IdlerTest->>IdlerTest: Gates Load Test Idler - load_gates (path: data/default_gates.yaml) IdlerTest->>IdlerTest: Start BRAM Load Test Idler - start_waveform IdlerTest->>IdlerTest: A0 idler - write_digital (name: A0, portnum: 1, state: {idlerA0A1A2Range}.get('{frequency}')[0]) IdlerTest->>IdlerTest: A1 idler - write_digital (name: A1, portnum: 1, state: {idlerA0A1A2Range}.get('{frequency}')[1]) IdlerTest->>IdlerTest: A2 idler - write_digital (name: A2, portnum: 1, state: {idlerA0A1A2Range}.get('{frequency}')[2]) IdlerTest->>IdlerTest: Sleep - pause (seconds: 0.2) IdlerTest->>IdlerTest: ON11V idler - write_digital (name: ON11V, portnum: 1, state: true) IdlerTest->>IdlerTest: Sleep - pause (seconds: 2.5) IdlerTest->>IdlerTest: Check Optical Power 1 - read_analog (name: P001, portnum: 1) IdlerTest->>IdlerTest: Eval Optical Power 1 - evaluate_expression (expression: is_value_in_between(prev('Check Optical Power 1'),{opticalPowerIdler0minMax}.get('{frequency}')[0],{opticalPowerIdler0minMax}.get('{frequency}')[1])==False) alt prev('Eval Optical Power 1') IdlerTest->>+Turnoffidlertest: Execute Turn Off Idler 1 Turnoffidlertest->>Turnoffidlertest: Turn Off PULSE1 PLD1 - write_digital (name: PULSE1, portnum: 2, state: false) Turnoffidlertest->>Turnoffidlertest: Turn Off ON11V Idler - write_digital (name: ON11V, portnum: 1, state: false) Turnoffidlertest-->>-IdlerTest: Complete end alt prev('Eval Optical Power 1') IdlerTest->>IdlerTest: Raise Exception - raise_exception (e: Idler Error: Error code 1) end IdlerTest->>IdlerTest: PULSE1 ON PLD1 - write_digital (name: PULSE1, portnum: 2, state: true) IdlerTest->>IdlerTest: Sleep - pause (seconds: 1) IdlerTest->>IdlerTest: Read ADC - single_offload (plot: false) IdlerTest->>IdlerTest: Eval Offload 1 - evaluate_expression (expression: is_value_in_between(mean(prev('Read ADC')[2]), {offloadIdler1minMax}.get('{frequency}')[0], {offloadIdler1minMax}.get('{frequency}')[1]) == False) alt prev('Eval Offload 1') IdlerTest->>+Turnoffidlertest: Execute Turn Off Idler 2 Turnoffidlertest->>Turnoffidlertest: Turn Off PULSE1 PLD1 - write_digital (name: PULSE1, portnum: 2, state: false) Turnoffidlertest->>Turnoffidlertest: Turn Off ON11V Idler - write_digital (name: ON11V, portnum: 1, state: false) Turnoffidlertest-->>-IdlerTest: Complete end alt prev('Eval Offload 1') IdlerTest->>IdlerTest: Raise Exception - raise_exception (e: Idler Error: Error code 2) end IdlerTest->>IdlerTest: Turn Off PULSE1 PLD1 - write_digital (name: PULSE1, portnum: 2, state: false) IdlerTest-->>-ArmLaser: Complete ArmLaser->>ArmLaser: Gates Load Test Seed - load_gates (path: data/default_gates_div.yaml) ArmLaser->>ArmLaser: Sleep - pause (seconds: 0.2) ArmLaser->>ArmLaser: Gates Write - write_gates ArmLaser->>ArmLaser: Sleep - pause (seconds: 0.2) ArmLaser->>ArmLaser: Select gate regime - select_gate_regime (selected_item: INT Cont., name: ) ArmLaser->>ArmLaser: Sleep - pause (seconds: 0.2) ArmLaser->>ArmLaser: Start Gates - start_waveform ArmLaser->>ArmLaser: PULSE1 PLD1 - write_digital (name: PULSE1, portnum: 2, state: true) ArmLaser-->>-User: Arm Laser Complete